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| INTEGRATED CIRCUITS DATA SHEET PCA2000; PCA2001 32 kHz watch circuit with programmable adaptive motor pulse Product specification Supersedes data of 2003 Feb 04 2003 Dec 17 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse FEATURES * Amplitude-regulated 32 kHz quartz crystal oscillator, with excellent frequency stability and high immunity to leakage currents * Electrically programmable time calibration with 1 ppm resolution stored in One Time Programmable (OTP) memory * The quartz crystal is the only external component connected * Very low power consumption, typical 90 nA * One second output pulses for bipolar stepping motor * Minimum power consumption for the entire watch, due to self adaptation of the motor drive according to the required torque * Reliable step detection circuit * Motor pulse width, pulse modulation, and pulse adaptation range programmable in a wide range, stored in OTP memory * Stop function for accurate time setting and power saving during shelf life * End Of Life (EOL) indication for silver oxide or lithium battery (only the PCA2000 has the EOL feature) * Test mode for accelerated testing of the mechanical parts and the IC. APPLICATIONS * Driver circuits for bipolar stepping motors * High immunity motor drive circuits. ORDERING INFORMATION PACKAGE TYPE NUMBER NAME PCA2000U/AA PCA2001U/AA PCA2000U/10AA PCA2001U/10AA - - - - bare die; chip in tray bare die; chip in tray bare die; chip on film frame carrier bare die; chip on film frame carrier DESCRIPTION PCA2000; PCA2001 GENERAL DESCRIPTION The PCA2000; PCA2001 are CMOS integrated circuits for battery operated wrist watches with a 32 kHz quartz crystal as timing element and a bipolar 1 Hz stepping motor. The quartz crystal oscillator and the frequency divider are optimized for minimum power consumption. A timing accuracy of 1 ppm is achieved with a programmable, digital frequency adjustment. To obtain the minimum overall power consumption for the watch, an automatic motor pulse adaptation function is provided. The circuit supplies only the minimum drive current, which is necessary to ensure a correct motor step. Changing the drive current of the motor is achieved by chopping the motor pulse with a variable duty cycle. The pulse width and the range of the variable duty cycle can be programmed to suit different types of motor. The automatic pulse adaptation scheme is based on a safe dynamic detection of successful motor steps. A pad RESET is provided (used for stopping the motor) for accurate time setting and for accelerated testing of the watch. The PCA2000 has a battery EOL warning function. If the battery voltage drops below the EOL threshold voltage (which can be programmed for silver oxide or lithium batteries), the motor steps change from one pulse per second to a burst of four pulses every 4 seconds. The PCA2001 uses the same circuit as the PCA2000, but without the EOL function. VERSION - - - - 2003 Dec 17 2 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse BLOCK DIAGRAM PCA2000; PCA2001 8 kHz OSCIN OSCOUT 3 4 OSCILLATOR 32 Hz DIVIDER RESET 8 RESET /4 TIMING ADJUSTMENT, INHIBITION 5 1 VOLTAGE DETECTOR, OTP-CONTROLLER OTP-MEMORY 1 Hz reset VDD VSS EOL PCA2000 only TEST 2 MOTOR CONTROL WITH ADAPTIVE PULSE MODULATION PCA2000 PCA2001 6 STEP DETECTION 7 mgw567 MOT1 MOT2 Fig.1 Block diagram. PINNING SYMBOL VSS TEST OSCIN OSCOUT VDD MOT1 MOT2 RESET PAD 1 2 3 4 5 6 7 8 DESCRIPTION ground test output oscillator input oscillator output supply voltage motor 1 output motor 2 output reset input OSCOUT 4 5 MGU554 handbook, halfpage VSS 1 2 8 7 RESET MOT2 TEST PCA2000 PCA2001 OSCIN 3 6 MOT1 VDD Fig.2 Pad configuration. 2003 Dec 17 3 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse FUNCTIONAL DESCRIPTION Motor pulse The motor output supplies pulses of different driving stages, depending on the torque required to turn on the motor. The number of different stages can be selected between three and six. With the exception of the highest driving stage, each motor pulse (tp in Figs 3 and 6) is followed by a detection phase during which the motor movement is monitored, in order to check whether the motor has turned correctly or not. If a missing step is detected, a correction sequence is generated (see Fig.3) and the driving stage is switched to the next level. The correction sequence consists of two pulses: first a short pulse in the opposite direction (0.98 ms, modulated with the maximum duty cycle) to give the motor a defined position, followed by a motor pulse of the strongest driving level. Every 4 minutes, the driving level is lowered again by one stage. The motor pulse has a constant pulse width. The driving level is regulated by chopping the driving pulse with a variable duty cycle. The driving level starts from the programmed minimum value and increases by 6.25% after each failed motor step. The strongest driving stage, which is not followed by a detection phase, is programmed separately. PCA2000; PCA2001 Therefore, it is possible to program a larger energy gap between the pulses with step detection and the strongest, not monitored, pulse. This might be necessary to ensure a reliable and stable operation under adverse conditions (magnetic fields, vibrations). If the watch works in the highest driving stage, the driving level jumps after the 4-minute period directly to the lowest stage, and not just one stage lower. To optimize the performance for different motors, the following parameters can be programmed: * Pulse width: 0.98 to 7.8 ms in steps of 0.98 ms * Duty cycle of lowest driving level: 37.5% to 56.25% in steps of 6.25% * Number of driving levels (including the highest driving level): 3 to 6 * Duty cycle of the highest driving level: 75% or 100% * Enlargement pulse for the highest driving level: on or off. The enlargement pulse has a duty cycle of 25% and a pulse width which is twice the programmed motor pulse width. The repetition period for the chopping pattern is 0.98 ms. Figure 4 shows an example of a 3.9 ms pulse. handbook, full pagewidth 1.96 ms detection phase tp 2t p tp MGW350 0.98 ms 31.25 ms 31.25 ms Fig.3 Correction sequence after failed motor step. 2003 Dec 17 4 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse PCA2000; PCA2001 handbook, full pagewidth DUTY CYCLE 0.244 ms 0.122 ms 37.5% 43.75% 50% 56.25% 62.5% 68.75% 75% 81.25% 100% 0.98 ms 0.98 ms 0.98 ms 0.98 ms MGW351 Fig.4 Possible modulations for a 3.9 ms motor pulse. Step detection Figure 5 shows a simplified diagram of the motor driving and step detection circuit, and Fig.6 shows the step detection sequence and corresponding sampling current. Between the motor driving pulses, the switches P1 and P2 are closed, which means the motor is short-circuited. For a pulse in one direction, P1 and N2 are open, and P2 and N1 are closed with the appropriate duty cycle; for a pulse in the opposite direction, P2 and N1 are open, and P1 and N2 closed. The step detection phase is initiated after the motor driving pulse (see Fig.3). P1 and P2 are first closed for 0.98 ms and then all four drive switches (P1, N1, P2 and N2) are opened for 0.98 ms. As a result, the energy stored in the motor inductance is reduced as fast as possible. The induced current caused by the residual motor movement is then sampled in phase 3 (closing P3 and P2) and in phase 4 (closing P1 and P4). For step detection in the opposite direction P1 and P4 are closed during phase 3 and P2 and P3 during phase 4 (see Fig.6). The condition for a successful motor step is a positive step detection pulse (current in the same direction as in the driving phase) followed by a negative detection pulse within a given time limit. This time limit can be programmed between 3.9 and 10.7 ms (in steps of 0.98 ms) in order to ensure a safe and correct step detection under all conditions (for instance magnetic fields). The step detection phase stops after the last 31.25 ms, after the start of the motor driving pulse. 2003 Dec 17 5 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse PCA2000; PCA2001 handbook, full pagewidth VDD RD D1 P1 P3 MOTOR MOT1 P4 P2 MOT2 N2 N1 VSS MGW352 Fig.5 Simplified diagram of motor driving and step detection circuit. handbook, full pagewidth phase 2 phase 3 phase 4 I MOT phase 1 positive detection level t negative detection level tp 0.98 ms (motor shorted) sampling voltage t d = 0.98 ms programmable time limit OTP C4 to C6 sampling t sampling voltage sampling results positive detection negative detection t motor shorted sampling 61 s 0.49 ms MGW569 Fig.6 Step detection sequence and corresponding sampling voltage. 2003 Dec 17 6 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse Time calibration The quartz crystal oscillator has an integrated capacitance of 5.2 pF, which is lower than the specified capacitance (CL) of 8.2 pF for the quartz crystal. Therefore, the oscillator frequency is typically 60 ppm higher than 32.768 kHz. This positive frequency offset is compensated by removing the appropriate number of 8192 Hz pulses in the divider chain (maximum 127 pulses), every 1 or 2 minutes. The time correction is given in Table 1. After measuring the effective oscillator frequency, the number of correction pulses must be calculated and stored together with the calibration period in the OTP memory (see Section "Programming the memory cells"). The oscillator frequency can be measured at pad RESET, where a square wave signal with the frequency of 1 ------------ x f osc is provided. 1024 This frequency shows a jitter every minute or every two minutes, depending on the programmed calibration period, which originates from the time calibration. Details on how to measure the oscillator frequency and the programmed inhibit time are given in Section "Measurement of oscillator frequency and inhibit time". Reset PCA2000; PCA2001 At pin RESET an output signal with a frequency of 1 ------------ x f osc = 32 Hz is provided. 1024 Connecting pad RESET to VDD stops the motor drive and opens all four (P1, N1, P2 and N2) driver switches (see Fig.5). Connecting pad RESET to VSS activates the test mode. In this mode the motor output frequency is 32 Hz, which can be used to test the mechanical function of the watch. After releasing the pad RESET, the motor starts exactly one second later with the smallest duty cycle and with the opposite polarity to the last pulse before stopping. The debounce time for the RESET function is between 31 and 62 ms. Programming possibilities The programming data is stored in OTP cells (EPROM cells). At delivery, all memory cells are in state 0. The cells can be programmed to the state 1, but then there is no more set back to state 0. The programming data is organized in an array of three 8-bit words: word A contains the time calibration, and words B and C contain the setting for the monitor pulses (see Table 2). Table 1 Time calibration CORRECTION PER STEP (n = 1) CORRECTION PER STEP (n = 127) ppm 258 129 seconds per day 22.3 11.15 CALIBRATION PERIOD ppm 1 minute 2 minutes Table 2 WORD 1 A B lowest stage: duty cycle 2 3 4 5 6 7 8 calibration period factory test bit number of 8192 Hz pulses to be removed number of driving stages highest stage: duty cycle and stretching Words and bits BIT 2.03 1.017 seconds per day 0.176 0.088 C pulse width maximum time delay between positive and negative detection pulses EOL voltage factory test bit 2003 Dec 17 7 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse Table 3 BIT Description of word A bits VALUE - DESCRIPTION Table 5 BIT PCA2000; PCA2001 Description of word C bits VALUE DESCRIPTION Inhibit time 1 to 7 Adjust the number of the 8192 Hz pulses to be removed. Bit 1 is the MSB and bit 7 is the LSB. Pulse width tpr (ms) 1 to 3 000 001 010 011 1 minute 2 minutes 100 101 110 111 0.98 1.95 2.90 3.90 4.90 5.90 6.80 7.80 Calibration period 8 0 1 Table 4 BIT Description of word B bits VALUE DESCRIPTION Time delay tmax (ms); note 1 4 to 6 000 001 010 011 100 101 110 111 3.91 4.88 5.86 6.84 7.81 8.79 9.77 10.74 Duty cycle lowest driving stage 1 to 2 00 01 10 11 37.5% 43.75% 50% 56.25% Number of driving stages 3 to 4 00 01 10 11 3 4 5 6; note 1 EOL voltage of the battery 7 0 1 Factory test bit 8 Note - 1.38 V (silver-oxide) 2.5 V (lithium) Duty cycle highest driving stage 5 0 1 Stretching pulse 6 0 1 Factory test bits 7 to 8 Notes 1. Including the highest driving stage, which one has no motor step detection. 2. If the maximum duty cycle of 75% is selected, not all programming combinations are possible since the second highest level must be smaller than the highest driving level. - pulse is not stretched pulse of 2tpr and duty cycle of 25% is added 75%; note 2 100% 1. Between positive and negative detection pulses. 2003 Dec 17 8 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse Programming procedure For a watch it is essential that the timing calibration can be made after the watch is fully assembled. In this situation, the supply pads are often the only terminals which are still accessible. Writing to the OTP cells and performing the related functional checks is achieved in the PCA2000; PCA2001 by modulating the supply voltage. The necessary control circuit consists basically of a voltage level detector, an instruction counter which determines the function to be performed, and an 8-bit shift register which allows writing to the OTP cells of an 8-bit word in one step and acts as a data pointer for checking the OTP content. There are five different instruction states (states 3 and 5 are handled as state 4): * State 1: measurement of the quartz crystal oscillator frequency (divided by 1024) * State 2: measurement of the inhibit time * State 3: write/check word A * State 4: write/check word B * State 5: write/check word C. Each instruction state is switched on with a pulse to VP (6.7 V). After this large pulse, an initial waiting time of t0 (20 ms) is required. The programming instructions are then entered by modulating the supply voltage with small pulses (amplitude VP(mod) = 0.35 V and pulse width tmod = 30 s). The first small pulse defines the start time, the following pulses perform three different functions, depending on the delay from the preceding pulse (see Figs 7, 8, 11, and 12): * t1 = 0.7 ms: increments the instruction counter * t2 = 1.7 ms: clocks the shift register with data = logic 0 * t3 = 2.7 ms: clocks the shift register with data = logic 1. The programming procedure requires a stable oscillator. This means that a waiting time, determined by the start-up time of the oscillator is necessary after power-up of the circuit. After the VP(start) pulse, the instruction counter is in state 1 and the data shift register is cleared. The instruction state ends with a second pulse to VP(stop) or with a pulse to Vstore. In any case, the instruction states are terminated automatically 2 seconds after the last VDD(mod) pulse. PCA2000; PCA2001 Programming the memory cells Applying the two-stage programming pulse (see Fig.7) transfers the stored data in the shift register to the OTP cells. Perform the following to program a memory word: 1. Starting with a VP(start) pulse wait for the time period t0 then set the instruction counter to the word you want to write (td = t1). 2. Enter the data you want to store in the shift register (td = t2 or t3). Enter the LSB first (bit 8) and the MSB last (bit 1). 3. Apply the two-stage programming pulse (Vpre-store then Vstore) stores the word. The delay between the last data bit and the pre-store pulse (Vpre-store) is td = t4. The example shown in Fig.7 performs the following functions: * Start * Setting instruction counter to state 4 (word B) * Entering data word 110101 into the shift register (sequence: first bit 6 and last bit 1) * Writing to the OTP cells for word B. General start up sequence You must follow the sequence below to ensure the correct operation at start up: 1. Apply the supply voltage to the circuit. 2. Wait for at least 2 seconds. 3. Connect the pad RESET to VDD for a minimum of 62 ms (this activates the stop mode). 4. Disconnect the pad RESET from VDD (this resets the circuit to normal operating mode). After this sequence the memory contents are read immediately and the programmed options are set. This sequence also resets all major circuit blocks and ensures that they function correctly. 2003 Dec 17 9 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse PCA2000; PCA2001 handbook, full pagewidth tpre-store Vstore VDD(mod) t p(start) VP(start) t0 VP(mod) VDD VSS MGW356 Vpre-store t1 t1 t1 t3 t2 t3 t2 t3 t3 t4 t store Fig.7 Supply voltage modulation for programming. Checking memory content The stored data of the OTP array can be checked bit wise by measuring the supply current. The array word is selected by the instruction state and the bit is addressed by the shift register. To read a word, the word is first selected (pulse distance t1), and a logic 1 is written into the first cell of the shift register (pulse distance t3). This logic 1 is then shifted through the entire shift register (pulse distance t2), so that it points with each clock pulse to the next bit. If the addressed OTP cell contains a logic 1, a 30 k resistor is connected between VDD and VSS, which increases the supply current accordingly. Figure 8 shows the supply voltage modulation for reading word B, with the corresponding supply current variation for word B = 110101 (sequence: first MSB and last LSB). 2003 Dec 17 10 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse PCA2000; PCA2001 VDD(mod) t p(start) VP(start) t0 VP(mod) VDD VSS t1 t1 t1 t3 t2 t2 t2 t2 VP(stop) t2 t p(stop) I DD (1) mgw357 V DD (1) I DD = --------------30 k Fig.8 Supply voltage modulation and corresponding supply current variation for reading word B. Frequency tuning of assembled watch Figure 9 shows the test set-up for frequency tuning the assembled watch. handbook, full pagewidth 32 kHz M FREQUENCY COUNTER PCA200x motor PROGRAMMABLE DC POWER SUPPLY PC INTERFACE battery PC MGW568 Fig.9 Frequency tuning at assembled watch. 2003 Dec 17 11 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse Measurement of oscillator frequency and inhibit time The output of the two measuring states can either be monitored directly at pad RESET or as a modulation of the supply voltage (a modulating resistor of 30 k is connected between VDD and VSS when the signal at pad RESET is at HIGH-level). You must follow the supply voltage modulation (see Fig.10)) in order to guarantee the correct start up of the circuit during production and testing. Customer testing PCA2000; PCA2001 Connecting pad RESET to VSS activates the test mode. In this test mode, the motor output frequency is 8 Hz; the duty cycle reduction and battery check occurs every second, instead of every 4 minutes. If the supply voltage drops below the EOL threshold voltage, the motor output frequency is 32 Hz with the highest driving level. EOL of battery The supply voltage is checked every 4 minutes. If it drops below the EOL reference (1.38 V for silver-oxide, 2.5 V for lithium batteries), the motor steps change from one pulse per second to a burst of four pulses every 4 seconds. The step detection is switched off, and the motor is driven with the highest pulse level. Only the PCA2000 has an EOL function. t p(stop) VDD VP(stop) t (start) > 500 ms VDD(nom) VSS 001aaa055 VDD handbook, halfpage VP(start) t p(start) t p(stop) VP(stop) t0 t1 Fig.10 Supply voltage at start up during production and testing. VP(mod) Measuring states: * State 1: quartz crystal oscillator frequency divided by 1024; state 1 starts with a pulse to VP and ends with a second pulse to VP * State 2: inhibit time (see Figs 11 and 12); a signal with periodicity of 31.25 + n x 0.122 ms appears at pad RESET and as current modulation at pad VDD. VDD(nom) VSS MGU719 Fig.12 Supply voltage modulation for starting and stopping of instruction state 2. handbook, halfpage 31.25 ms + inhibition time VDD VSS MGW355 Fig.11 Output waveform at pad RESET for instruction state 2. 2003 Dec 17 12 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134). SYMBOL VDD Vi Tamb Tstg to(sc) Notes PARAMETER supply voltage all input voltages ambient temperature storage temperature output short-circuit duration CONDITIONS VSS = 0 V; notes 1 and 2 -1.8 VSS - 0.5 -10 -30 MIN. PCA2000; PCA2001 MAX. +7.0 VDD + 0.5 +60 +100 indefinite V V C C s UNIT 1. For writing to the OTP cells, the supply voltage VDD can be raised to a maximum of 12 V for a period of 1 second. 2. Connecting the battery with reversed polarity does not destroy the circuit, but in this condition a large current flows, which rapidly discharges the battery. HANDLING Inputs and outputs are protected against electrostatic discharges in normal handling. However to be totally safe, it is advised to undertake handling precautions appropriate to handling MOS devices. Advice can be found in "Data handbook IC16: General; handling MOS devices". CHARACTERISTICS VDD = 1.55 V; VSS = 0 V; fosc = 32.768 kHz; Tamb = 25 C; quartz crystal: RS = 40 k, C1 = 2 to 3 fF, CL = 8.2 pF; unless otherwise specified. SYMBOL Supply VDD VDD IDD supply voltage supply voltage variation supply current normal operating mode; Tamb = -10 to +60 C V/t = 1 V/s between motor pulses between motor pulses at VDD = 3.5 V Tamb = -10 to +60 C stop mode; pad RESET connected to VDD Motor output Vsat Zsc Oscillator Vstart gm tosc f/f Cint Rpar starting voltage transconductance start-up time frequency stability integrated load capacitance parasitic resistance VDD = 100 mV VOSCIN 50 mV (p-p) 1.1 5 - - 4.3 allowed resistance between adjacent pads 20 - 10 0.3 0.05 5.2 - - - 0.9 0.20 6.3 - V S s ppm pF M saturation voltage short-circuit impedance RM = 2 k; Tamb = -10 to +60 C; note 1 between motor pulses; Imotor < 1 mA - - 150 200 200 300 mV 1.10 - - - - - 1.55 - 90 120 - 100 3.60 0.25 120 180 200 135 V V nA nA nA nA PARAMETER CONDITIONS MIN. TYP. MAX. UNIT 2003 Dec 17 13 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse SYMBOL PARAMETER CONDITIONS PCA2000; PCA2001 MIN. TYP. MAX. UNIT Voltage level detector Vth(EOL) TCEOL fo Vo tr, tf Ii(AV) Notes 1. (P + N). 2. RL and CL are a load resistor and load capacitor, externally connected to pad RESET. Table 6 Specifications for OTP programming (see Figs 7, 8 and 12). PARAMETER(1) supply voltage during programming procedure supply voltage for starting programming procedure supply voltage for stopping programming procedure supply voltage modulation for entering instructions supply voltage for pre-store pulse supply voltage for writing to the OTP cells supply current for writing to the OTP cells pulse width of start pulse pulse width of stop pulse modulation pulse width pulse width of pre-store pulse pulse width for writing to the OTP cells waiting time after start pulse pulse distance for incrementing the state counter pulse distance for clocking the data register with data = logic 0 pulse distance for clocking the data register with data = logic 1 waiting time for writing to OTP cells slew rate for modulation of the supply voltage supply current modulation read-out resistor MIN. 1.5 6.6 6.2 320 6.2 9.9 - 8 0.05 25 0.05 95 20 0.6 1.6 2.6 0.1 0.5 18 TYP. - - - 350 - 10.0 - 10 - 30 - 100 - 0.7 1.7 2.7 0.2 - 30 MAX. 3.0 6.8 6.4 380 6.4 10.1 10 12 0.5 40 0.5 110 30 0.8 1.8 2.8 0.3 5.0 45 UNIT V V V mV V V mA ms ms s ms ms ms ms ms ms ms V/s k EOL threshold voltage temperature coefficient silver-oxide battery lithium battery Pad RESET output frequency output voltage swing rise and fall time average input current RL = 1 M; CL = 10 pF; note 2 RL = 1 M; CL = 10 pF; note 2 pad RESET connected to VDD or VSS - 1.4 - - 32 - 1 10 - - - 20 Hz V s nA 1.30 2.35 - 1.38 2.50 -0.07 1.46 2.65 - V V %/C SYMBOL VDD VP(start) VP(stop) VP(mod) Vpre-store Vstore Istore tp(start) tp(stop) tmod tpre-store tstore t0 t1 t2 t3 t4 SR Rread Note 1. Program each word once only. 2003 Dec 17 14 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse BONDING PAD LOCATIONS COORDINATES(1) SYMBOL VSS(3) TEST(2) OSCIN OSCOUT VDD MOT1 MOT2 RESET Notes 1. All coordinates are referenced, in m, to the centre of the die (see Fig.13). 2. Pad TEST is used for factory tests; in normal operation it should be left open-circuit, and it has an internal pull-down resistance to VSS. 3. The substrate (rear side of the chip) is connected to VSS. Therefore the die pad must be either floating or connected to VSS. PAD x 1 2 3 4 5 6 7 8 -480 -480 -480 -480 +480 +480 +480 +480 y +330 +160 -160 -330 -330 -160 +160 +330 metal opening Thickness: chip for bonding Table 7 PCA2000; PCA2001 Mechanical chip data; note 1 PARAMETER VALUE 96 x 96 m 86 x 86 m 200 25 m 270 25 m 25 5 m Bonding pad: chip for golden bumps Bumps: height Note 1. The substrate of the chip is connected to VSS. handbook, halfpage 1.20 mm VSS TEST 0.90 mm OSCIN OSCOUT 1 y 2 x 0 3 4 0 8 7 PC2000 PC2001 RESET MOT2 6 5 MGW353 MOT1 VDD Fig.13 Bonding pad locations. 2003 Dec 17 15 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse TRAY INFORMATION PCA2000; PCA2001 handbook, full pagewidth x A G H 1,1 1,2 1,3 2,1 2,2 3,1 x,1 C y D B F 1,y x,y A E M A J SECTION A-A MGU653 Fig.14 Tray details. Table 8 Tray dimensions DESCRIPTION pocket pitch; x direction pocket pitch; y direction pocket width; x direction pocket width; y direction tray width; x direction tray width; y direction distance from cut corner to pocket (1, 1) centre distance from cut corner to pocket (1, 1) centre tray thickness pocket depth number of pockets in x direction number of pockets in y direction VALUE 2.15 mm 2.43 mm 1.01 mm 1.39 mm 50.67 mm PCA2000 PCA2001 DIMENSION A B C D E F G H J M x y handbook, halfpage 50.67 mm 4.86 mm 4.66 mm 3.94 mm 0.61 mm 20 18 MGU652 The orientation of the IC in a pocket is indicated by the position of the IC type name on the surface of the die, with respect to the cut corner on the upper left of the tray. Fig.15 Tray alignment. 2003 Dec 17 16 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse DATA SHEET STATUS LEVEL I DATA SHEET STATUS(1) Objective data PRODUCT STATUS(2)(3) Development PCA2000; PCA2001 DEFINITION This data sheet contains data from the objective specification for product development. Philips Semiconductors reserves the right to change the specification in any manner without notice. This data sheet contains data from the preliminary specification. Supplementary data will be published at a later date. Philips Semiconductors reserves the right to change the specification without notice, in order to improve the design and supply the best possible product. This data sheet contains data from the product specification. Philips Semiconductors reserves the right to make changes at any time in order to improve the design, manufacturing and supply. Relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). II Preliminary data Qualification III Product data Production Notes 1. Please consult the most recently issued data sheet before initiating or completing a design. 2. The product status of the device(s) described in this data sheet may have changed since this data sheet was published. The latest information is available on the Internet at URL http://www.semiconductors.philips.com. 3. For data sheets describing multiple type numbers, the highest-level product status determines the data sheet status. DEFINITIONS Short-form specification The data in a short-form specification is extracted from a full data sheet with the same type number and title. For detailed information see the relevant data sheet or data handbook. Limiting values definition Limiting values given are in accordance with the Absolute Maximum Rating System (IEC 60134). Stress above one or more of the limiting values may cause permanent damage to the device. These are stress ratings only and operation of the device at these or at any other conditions above those given in the Characteristics sections of the specification is not implied. Exposure to limiting values for extended periods may affect device reliability. Application information Applications that are described herein for any of these products are for illustrative purposes only. Philips Semiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification. DISCLAIMERS Life support applications These products are not designed for use in life support appliances, devices, or systems where malfunction of these products can reasonably be expected to result in personal injury. Philips Semiconductors customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Philips Semiconductors for any damages resulting from such application. Right to make changes Philips Semiconductors reserves the right to make changes in the products including circuits, standard cells, and/or software described or contained herein in order to improve design and/or performance. When the product is in full production (status `Production'), relevant changes will be communicated via a Customer Product/Process Change Notification (CPCN). Philips Semiconductors assumes no responsibility or liability for the use of any of these products, conveys no licence or title under any patent, copyright, or mask work right to these products, and makes no representations or warranties that these products are free from patent, copyright, or mask work right infringement, unless otherwise specified. 2003 Dec 17 17 Philips Semiconductors Product specification 32 kHz watch circuit with programmable adaptive motor pulse PCA2000; PCA2001 Bare die All die are tested and are guaranteed to comply with all data sheet limits up to the point of wafer sawing for a period of ninety (90) days from the date of Philips' delivery. If there are data sheet limits not guaranteed, these will be separately indicated in the data sheet. There are no post packing tests performed on individual die or wafer. Philips Semiconductors has no control of third party procedures in the sawing, handling, packing or assembly of the die. Accordingly, Philips Semiconductors assumes no liability for device functionality or performance of the die or systems after third party sawing, handling, packing or assembly of the die. It is the responsibility of the customer to test and qualify their application in which the die is used. 2003 Dec 17 18 Philips Semiconductors - a worldwide company Contact information For additional information please visit http://www.semiconductors.philips.com. Fax: +31 40 27 24825 For sales offices addresses send e-mail to: sales.addresses@www.semiconductors.philips.com. (c) Koninklijke Philips Electronics N.V. 2003 SCA75 All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of the copyright owner. The information presented in this document does not form part of any quotation or contract, is believed to be accurate and reliable and may be changed without notice. No liability will be accepted by the publisher for any consequence of its use. Publication thereof does not convey nor imply any license under patent- or other industrial or intellectual property rights. Printed in The Netherlands R15/03/pp19 Date of release: 2003 Dec 17 Document order number: 9397 750 11757 |
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